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Updated memory storage functionality

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- cachedStorage is functional
- Presets can be loaded from FLASH
- CRC32 added and applied
- Presets with corrputed data will be replaced by default preset

Next: Preset update functionality from menu 

git-svn-id: https://svn.vbchaos.nl/svn/hsb/trunk@269 05563f52-14a8-4384-a975-3d1654cca0fa
This commit is contained in:
mmi
2017-11-02 12:58:27 +00:00
parent 76783a6061
commit 4901cb1a09
27 changed files with 894 additions and 144 deletions
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10
S - Software/0 - HSB MRTS Kathode-MCP/3 - Implementation/0 - Code/HAL/inc/CachedStorage.h
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@@ -52,12 +52,12 @@
struct CachedStorage
{
bool initialized;
unsigned int pageSize;
unsigned int pageNumber;
unsigned int cacheSize;
bool dirty;
unsigned int page;
struct MemoryDevice* memoryDevice;
uint8_t storage[CACHED_STORAGE_PAGESIZE];
uint8_t tempBuffer[CACHED_STORAGE_PAGESIZE];
uint8_t storage[CACHED_STORAGE_PAGESIZE * 4]; // Times 4 to get 32bit width
uint8_t tempBuffer[CACHED_STORAGE_PAGESIZE * 4]; // Times 4 to get 32bit width
};
// -----------------------------------------------------------------------------
@@ -68,7 +68,7 @@ struct CachedStorage
/**
* Initializes the EEPROM hardware and reads the flash page
*/
ErrorStatus CachedStorage_construct(struct CachedStorage* self, struct MemoryDevice* memoryDevice, unsigned int page, unsigned int pageSize);
ErrorStatus CachedStorage_construct(struct CachedStorage* self, struct MemoryDevice* memoryDevice, unsigned int pageNumber);
/**
* Terminates the EEPROM hardware. SPI port is available again