Processed redesign issues of rev PA3.
Ready for internal review.

git-svn-id: https://svn.vbchaos.nl/svn/hsb/trunk@308 05563f52-14a8-4384-a975-3d1654cca0fa
This commit is contained in:
tla
2017-11-30 09:58:00 +00:00
parent 05f2dc8653
commit 4ca1050709
29 changed files with 354089 additions and 304017 deletions

View File

@@ -292,7 +292,7 @@ Value=Yes
[Parameter8]
Name=SCH_Rev
Value=PA3
Value=PB0
[Parameter9]
Name=Project_Title
@@ -304,7 +304,7 @@ Value=1.6 mm
[Parameter11]
Name=PCB_Rev
Value=MLA-0387-P0-PA3
Value=MLA-0387-P0-PB0
[Parameter12]
Name=PCB_Dimension
@@ -961,46 +961,6 @@ OutputName9=Specctra Design PCB
OutputDocumentPath9=
OutputVariantName9=
OutputDefault9=0
OutputType10=Ansoft Neutral
OutputName10=Ansoft Neutral (AutoPCB)
OutputDocumentPath10=
OutputVariantName10=
OutputDefault10=0
OutputType11=HyperLynx
OutputName11=HyperLynx (AutoPCB)
OutputDocumentPath11=
OutputVariantName11=
OutputDefault11=0
OutputType12=Orcad SDT Schematic
OutputName12=Orcad SDT Schematic (AutoSCH)
OutputDocumentPath12=
OutputVariantName12=
OutputDefault12=0
OutputType13=Orcad v7 Capture Design
OutputName13=Orcad v7 Capture Design (AutoSCH)
OutputDocumentPath13=
OutputVariantName13=
OutputDefault13=0
OutputType14=P-CAD ASCII
OutputName14=P-CAD ASCII (AutoPCB)
OutputDocumentPath14=
OutputVariantName14=
OutputDefault14=0
OutputType15=P-CAD V16 Schematic Design
OutputName15=P-CAD V16 Schematic Design (AutoSCH)
OutputDocumentPath15=
OutputVariantName15=
OutputDefault15=0
OutputType16=Protel PCB 2.8 ASCII
OutputName16=Protel PCB 2.8 ASCII (AutoPCB)
OutputDocumentPath16=
OutputVariantName16=
OutputDefault16=0
OutputType17=SiSoft
OutputName17=SiSoft (AutoPCB)
OutputDocumentPath17=
OutputVariantName17=
OutputDefault17=0
[OutputGroup10]
Name=PostProcess Outputs
@@ -1270,6 +1230,7 @@ Type110=1
Type111=1
Type112=1
Type113=1
MultiChannelAlternate=2
[ERC Connection Matrix]
L1=NNNNNNNNNNNWNNNWW